1. Technical Field
Various embodiments generally relate to a semiconductor device, and more particularly to a semiconductor device having high test efficiency.
2. Related Art
The demand for high-speed, multi-functional and miniaturized semiconductor device continues to grow. A chip scale package is a part of the efforts to develop such a semiconductor device. For example, a System on Chip (SoC) is an integrated circuit that integrates various components of an electronic system into a single chip. In the System on Chip, a plurality of bump pads can be disposed.
FIG. 1 is a schematic block diagram illustrating a known SoC having a wide-IO DRAM.
Referring to FIG. 1, an SoC 1 includes four channels ch A, ch B, ch C, and ch D.
Each of the channels includes four banks BK0, BK1, BK2, and BK3.
Each channel includes a peripheral region PERI thereof, and the peripheral regions PERIs include the respective clock buffers 10a, 10b, 10c, and 10d therein. The channels ch A, ch B, ch C, and ch D include the respective bump pad groups a, b, c, and d to transmit and receive signals to and from an external system. The respective bump pad groups a, b, c, and d, include bump pads provided for clock, address, command, DQ, and power.
In addition, a semiconductor device may have pads PAD for probe test on the center column thereof.
In order for a system provider to estimate the characteristics of a DRAM itself, a mode of applying an input directly to the DRAM, without passing through a system, is required. In order to test memory cells in the banks of each channel, a direct access (hereinafter, referred to as “DA”) mode test method is used. In the DA mode, since a function test needs to be performed with a minimum number of bump pads, input signals are transmitted to and received from all channels in common.
FIG. 1 illustrates a case where the respective clock buffers 10a, 10b, 10c, and 10d are coupled to one bump pad for clock in common, in a DA mode. A signal applied to one bump pad is applied to the respective corresponding channel signal units in common.
However, it is impossible in a DA mode to perform a boundary test, which is performed to check defects in bump pads, on each channel individually. In addition, since signals of all channels are applied in common, it is impossible to control electrical fuses of each channel individually. Moreover, it is impossible in a DA mode to measure the amount of current by channel, which is required in the Wide IO JEDEC Standard.